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dc.contributor.author Romanescu, BF
dc.contributor.author Lebeck, AR
dc.contributor.author Sorin, DJ
dc.contributor.author Bracy, A
dc.date.accessioned 2011-05-18T01:55:33Z
dc.date.issued 2010-05-27
dc.identifier.citation Proceedings - International Symposium on High-Performance Computer Architecture, 2010
dc.identifier.isbn 9781424456581
dc.identifier.issn 1530-0897
dc.identifier.uri http://hdl.handle.net/10161/3765
dc.description.abstract We propose UNITD, a unified hardware coherence framework that integrates translation coherence into the existing cache coherence protocol. In UNITD coherence protocols, the TLBs participate in the cache coherence protocol just like the instruction and data caches, without requiring any changes to the existing coherence protocol. UNITD eliminates the need for the software TLB shootdown routine, a procedure known to be performance costly and non-scalable. We evaluate snooping and directory UNITD coherence protocols on multicore processors with 2-16 cores, and we demonstrate that UNITD reduces the performance penalty associated with TLB coherence to almost zero. ©2009 IEEE.
dc.language.iso en_US en_US
dc.relation.ispartof Proceedings - International Symposium on High-Performance Computer Architecture
dc.title Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all
dc.type Conference Proceeding
duke.contributor.id 114435 en_US
pubs.organisational-group /Duke
pubs.organisational-group /Duke/Pratt School of Engineering
pubs.organisational-group /Duke/Pratt School of Engineering/Electrical and Computer Engineering
pubs.organisational-group /Duke/Trinity College of Arts & Sciences
pubs.organisational-group /Duke/Trinity College of Arts & Sciences/Computer Science
pubs.publication-status Published

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