Browsing by Author "Franklin, Aaron D"

The rapid maturation of the internet of things (IoT) has led to an ever-stronger drive for large-area, flexible, and/or customizable electronics for data collection, display, and communication. The use of printing technology for IoT and thin-film electronics has shown growing promise due to its potential in low-cost and high-throughput manufacturing, as well as the capability to handle a wide array of substrates, materials, and production techniques (e.g., mass-production or customizable). At the heart of many IoT devices are thin-film transistors (TFTs). Carbon nanotubes (CNTs) have been considered promising candidates for printed TFTs due to their extraordinary electronic properties and material attributes, such as mechanical flexibility and low-temperature processability. Despite the significant research progress in printing CNT-TFTs and demonstrating CNT-TFTs in applications, process variability has still remained a major obstacle to the translation of CNT-TFTs out of the lab and into products. In addition, most printing processes reported in the literature involve post-printing thermal treatments, limiting the throughput and efficiency of printing approaches. This dissertation contains scientific discoveries, technical advancements, and innovations that reduce the process variability of CNT-TFTs and lead to the development of print-in-place processes -- a series of rapid, versatile, and streamlined printing approaches for yielding CNT-TFTs without any postprocessing. The key enabling factor of variability reduction is to understand the impact of CNT ink temperature, a commonly overlooked factor, on the resultant ink deposition via aerosol jet printing (AJP). It was discovered that an appropriately lowered ink temperature benefits both long-term (~1 hour) and short-term (~1 minute) stability of AJP, resulting in fully printed TFTs with average mobility of 12.5 cm2/V·s and mobility variation as small as 4%. The streamlining of the print-in-place processes for CNT-TFTs involved identifying low-temperature processable materials and formulating corresponding printable inks from these materials. By printing silver nanowires (AgNW) as the electrical contacts and hexagonal boron nitride (h-BN) as the gate insulator, the maximum processing temperature of the print-in-place process was reduced to 80 °C with no additional thermal treatment required. Notably, the resultant devices (known as 1D-2D TFTs) showed relatively good performance, including an on/off-current ratio up to 3.5×105, channel mobility up to 10.7 cm2/V∙s, small gate hysteresis, and superb mechanical stability under bending. In addition, another print-in-place process was demonstrated by employing a side-gate configuration with an ion gel dielectric and graphene contacts. Compared to the fabrication process for 1D-2D TFTs, this 3-step process was even more streamlined, and the resulting devices exhibited more uniform performance at the cost of the on/off-current ratio. Besides variability reduction and streamlining, the versatility and environmental friendliness of printed CNT-TFTs were also enhanced by studying the use of all-aqueous inks for CNT-TFTs. The study unveiled the printing challenges imposed by aqueous CNT inks compared to the more commonly used inks that depend on harsh solvents, such as toluene. It was discovered that the ionic surfactant in the aqueous inks hinders the CNT adhesion with the substrate, and a multi-step process with interstitial rinsing was proposed to mitigate this issue. Through the combination of aqueous CNT, graphene, and crystalline nanocellulose (CNC) inks, water-only TFTs were printed without the use of any harsh chemical solvents, and most device layers are either recyclable or biodegradable. In addition, although this dissertation is primarily focused on the printing techniques used to make CNT-TFTs, the materials and methods developed in the works were also utilized to demonstrate a surface acoustic wave (SAW) tuning device, an uncommon application for CNT-TFTs. The phase-velocity tunability (∆v/v = 2.5% ) was exceptional and close to the theoretical limit, suggesting the promise of CNT-TFTs for SAW applications and that there exist numerous unexplored areas where CNT-TFTs could potentially be advantageous. Overall, the findings and advancements contributed by this dissertation advance the printing of CNT-TFT by addressing obstacles and demonstrating possibilities. These include the developed methodologies, such as the print-in-place approaches and the multi-step aqueous printing with interstitial rinsing, along with the discoveries that may trigger follow-up studies, such as the correlation between ink temperature and process variability. Combined, these contributions help to reduce the variability, lower the process duration, and enhance the versatility of printed CNT-TFTs, pushing the field toward ubiquitous use in real-world applications.

As the cost of medical care increases, people are relying increasingly on internet diagnosis and community care rather than the expertise of medical professionals. Technological and medical advances have facilitated a partial answer through the increase in handheld sensing apparatuses. Yet even with these developments, significant further advancements are required to further drive down fabrication requirements (both in terms of cost and environmental impact) and facilitate fully-integrated and easy to use sensors. Printing electronics could be a powerful tool to accomplish this as printing allows for low-cost fabrication of high-area electronics. The vast majority of printed electronics reports focus on utilization of already developed commercial inks to create devices with new functionalities. This significantly limits development because current inks both necessitate damaging post processing—which precludes the use of delicate substrates, making skin-integration impossible—and many inks require bespoke printing processes, which increases fabrication complexity and thus cost. Further, with the proliferation of single-use medical testing, consideration must be made towards environmental compatibility. Therefore, innovations in electronic ink formulation and printing geared towards addressing the post-processing and environmental impact concerns are needed to enable continued progress towards printed POC sensors. The work contained in this dissertation centers around the development of inks intended to advance electronic biosensing applications. Focus is on using aerosol jet printing to enable the printing of nanomaterials and utilizes the unique properties of these nanomaterials—such as functionality immediately after printing, recyclability, and compatibility with deposition directly on biological surfaces (i.e., human skin)—to develop technologies intended to democratize healthcare. Notably, low temperature printable silver nanowire (AgNW) inks for the creation of biologically integrated electronics are demonstrated. Electrically conductive inks are created that are capable of achieving high conductivities when directly deposited onto living tissue at temperatures compatible with life (20 °C). The conductive lines yielded high resistance to degradation from bending strain, with a mere 8% decrease in conductivity when the plastic film on which they were printed was folded in half. As a demonstration, the AgNW ink was printed onto a human finger and used to illuminate a small light that remained illuminated even when the finger was bent. These results pave the way towards patient-specific medical diagnostics that are comfortable to wear, easy to use, and designed towards the needs of each individual patient. Next, a printing method to deposit biological sensing proteins for biomedical assays is investigated. Traditional techniques require extended time and the use of large quantities of immensely expensive proteins to make biosensors. Herein, a decade-old belief that aerosol jet printing is incompatible with the deposition of proteins is overturned, and, in doing so, highly sensitive biosensors for carcinoembryonic antigen (CEA) that compare favorably the mainstay fabrication technique that is known to impart no damage to the printed biological inks is demonstrated. Finally, the co-printing of a bio-recognition element with the previously mentioned electrically conductive AgNW ink demonstrate the potential for the future investigation of a fully aerosol-jet printed electronic biosensor. To address the environmental waste accumulation concern that plagues the advancement of ubiquitous patient-guided sensing, inks that facilitate the creation of fully-printed, all-carbon recyclable electronics (ACRE) are investigated. The combination of nanocrystalline cellulose, graphene and semiconducting carbon nanotubes enable the first fully recyclable transistor device. The ACRE transistors maintain high stability for over 10 months, display among the best performance of any printed transistor (Ion/Ioff: 104 and Ion 65 µA µm-1) and can be entirely deconstructed for recapture and reuse of the constituent CNT and graphene inks with near 100% nanomaterial retention and the biodegradation of the cellulose-based components. ACRE-based lactate sensors are used as an illustration of utility to show the versatility of the platform. Finally, as a culminating demonstration, a fully-printed chip for the handheld measurement of blood clot time (prothrombin time) was developed. Printing the entirety of the device allows for the creation of a low-cost chip for the simple, fast, and robust measurement of human blood clot times. In addition, a custom-designed, handheld control system with a 3D-printed case was developed to create a fully integrated point-of-care measurement platform towards simplifying medicine dosing strategies. The work described herein marks a significant leap in the development of printed inks to enable custom biological sensing applications. Once fully realized, these applications will mark a watershed, ushering in an era of individualized medicine with ubiquitous sensing to actively track disease progression in real-time. We are at the dawn of a new era in medicine that focuses more on prevention and control as opposed to reaction. One future direction for this work is promoting directly printed and reusable on-skin theragnostics for bespoke patient care such as the delivery and monitoring of pain medication that allows for better oversite over use and misuse.

As the Internet of Things (IoT) continues to expand, there is increasing demand for custom low-cost sensors, displays, and communication devices that can grow and diversify the electronics ecosystem. The benefits to society of a vibrant, ubiquitous IoT include improved safety, health, and productivity as larger and more relevant datasets are able to be generated for fueling game-changing artificial intelligence and machine learning models. Printed carbon nanotube thin-film transistors (CNT-TFTs) have emerged as preeminent devices for enabling potentially transformative capabilities from, and widespread use of, IoT electronics. Still, despite intensive research over the past 15 years, there has yet to be the development of a streamlined, direct-write, in-place printing process, similar to today’s widely used inkjet or 3D printing technologies, where the substrate never leaves the printing stage and requires little to no post-processing. The development of such a process for producing CNT-TFTs could lead to the emergence of print-on-demand electronics, where direct-write printers are capable of printing distinct IoT sensing devices or even full IoT systems with little to no user intervention.

The work contained in this dissertation describes discoveries and innovations for streamlining and optimizing direct-write printed electronics using in-line or in-place methods, with primary focus on an in-place printing process for producing CNT-TFTs at relatively low temperature. The key enabling aspect of the in-place printing of CNT-TFTs was the development of aerosol jet-printable low-temperature conductive and dielectric inks that are functional immediately after printing. Additionally, the printed semiconducting CNT films required modified rinsing procedures for in-line processing, which proved to enhance performance. Notably, the resulting CNT-TFTs exhibited promising performance metrics with on/off-current ratios exceeding 103 and mobilities up to 11 cm2V-1s-1, while also operating under mechanical strain or after long-term bias stress, despite being printed with a maximum process temperature of only 80 °C. While optimizing these devices, various contact morphologies and configurations were investigated, where it was found that there was less variability in performance between sets of top-contacted devices, compared to bottom-contacts. Additionally, it was discovered that there are processing and performance trade-offs associated with various contact morphologies, with silver nanowires holding most value for in-place printing.

Although primary focus is given to aerosol jet-printed, CNT-based devices, this work also outlines another rapid, and potentially in-line, process for improving IoT-relevant electronics printed from a widely used direct-write method: fused filament fabrication. Here, using a high intensity flash lamp, the conductance of thermoplastic filaments are enhanced by up to two orders of magnitude. It was found that high-intensity light vaporizes the topmost layer of thermoplastic on metal-composite filaments, leaving behind a metallized surface layer in a technique referred to as flash ablation metallization (FAM). FAM was then used to enhance the performance of 3D printed circuit boards, demonstrating use in an immediately relevant application.

Overall, the development of in-place printed CNT-TFTs and the FAM process establish practical and scientific foundations for continued progress toward print-on-demand electronics. These foundations include: the development of low-temperature inks, rapid and in-line compatible process methods, and investigations of the impacts of various materials, device configurations, or process steps on electronic performance. Altogether, these developments have the potential to lower the time, costs, and overhead associated with printed electronics, moving the field closer to a point that is more accessible to industrialists, academics, and hobbyists alike.

As society becomes increasingly data-driven, the appetite of individuals, corporations, and algorithms for data sources swells, strengthening the demand for sensors. Chemical sensors are of particular interest as they provide highly human-relevant information, such as DNA sequences, cancer biomarker concentrations, blood glucose levels, antibody detection, and viral testing, to name a few. Among the most promising transduction elements for chemical sensors are nanomaterial field-effect transistors (FETs). The nanoscale size of these devices allows them to operate using very small sample sizes (an extremely small volume of patient blood, for instance), be strongly influenced by low concentrations of the target chemical, and be produced at low-cost, potentially using the same methods developed for consumer electronics (which have achieved a cost of less than 0.000001 cents per device). Nanomaterial FET-based chemical sensors also have the advantage of directly transducing a chemical presence or change to an electrical output signal. This avoids components such as lasers, optics, fluorophores, and more, that are frequently used as a part of the transduction chain in other types of chemical sensors, adding size, complexity, and cost. Much work has focused on demonstrating one-off nanomaterial FET-based sensors, but less work has been done to determine the underlying mechanisms that lead to sensitivity by mapping sensitivity against other variables in experimental devices. With challenges of consistency and reproducible operation stifling progress in this field, there is a significant need to improve understanding of nanomaterial-based FET sensitivity and operation mechanisms.

The work contained in this dissertation maps the sensitivity of nanomaterial FETs across a range of parameters, including space, time, device operating point, and analyte charge. This mapping is performed in an effort to yield insight into the underlying mechanisms that govern the sensitivity of these devices to nearby charges. In order to both draw comparisons between different device types and to make the results of this work broadly applicable to the field as a whole, four types of devices were studied that span a broad range of characteristics. The device types spanned from channels of one-dimensional nanotubes to three-dimensional nanostructures, and from partially printed fabrication to cleanroom-based nanofabrication. Specifically, the devices explored herein are carbon nanotube (CNT) FETs, molybdenum disulfide (MoS2) FETs, silicon nanowire FETs, and carbon nanotube thin-film transistors (CNT-TFTs). Fabrication processes were developed to build devices of each of these types that are capable of undergoing long-term electronic testing with reliable contact strategies. Passivation schemes were also developed for each device type to enable testing in solution and formation of solution-based sensors so that results could be extended to the case of biosensors. An automated experimentation platform was developed to enable tight synchronization between characterization instruments so that each variable impacting device sensitivity could be controlled and measured in tandem, in some cases for months on end.

Many of the obtained results showed similar trends in sensitivity between device types, while some findings were unique to a given channel material. All tested devices showed stability after a period of drain current settling caused by the occupation equilibration of charge trap states – an effect that was found to severely reduce sensitivity and dynamic range. For CNTs specifically, two new decay modes were discovered (intermediate between device stability and breakdown) along with respective onset voltages that can be used to avoid them. For CNT-TFTs, it was found that the relationship between signal-to-noise ratio (SNR) and device operating point remained consistent between ambient air and solution environments, indicating that this relationship is governed primarily by properties of the device. A simple chemical sensor made from the same devices showed a clear peak in the SNR near the device threshold voltage – a result that became increasingly meaningful when combined with similar observations in other device types obtained via separate experimental methods.

For both silicon nanowire and MoS2 FETs, sensitivity was mapped in space with sub-nanometer precise control over analyte position. Both device types manifested distinct sensitivity hotspots spread across the geometry of the channel. These hotspots were found to be stable in time, but their prominence depended heavily on the device operating point. When SNR was mapped across a range of operating points for these devices, a clear peak was discovered, with the hotspot intensity culminating at the peak. Ideal operating points were identified to be near the threshold voltage for both device types, with findings (and a developed numerical model) in MoS2 indicating that the operating point where SNR is maximized may depend upon the extent of the channel that is influenced by the analyte. Observations from multiple devices and approaches revealed that SNR peaks below the point of maximal transconductance, offering increased resolution to a matter that has previously been of some debate in the literature. In MoS2 FETs, a significant asymmetry was discovered in the response of devices to analytes of opposing polarity, with analytes that modulate devices toward their off-state eliciting a much larger response (and, correspondingly, SNR). This asymmetry was confirmed by a numerical model that suggested it to be a general result applicable to all FET-based charge detection sensors, leading to the recommendation that sensor designers select FETs that will be turned off by the target analyte.

Each finding contributed by this dissertation provides insight into future sensor designs and increases clarity of the underlying mechanisms leading to sensitivity in nanomaterial FET-based sensors. The discovery of decay modes, hotspots, ideal operating points, asymmetries, and other trends comprise substantial scientific advancements and propel the field closer to the goal of providing ubiquitous access to critical information, diagnoses, and measurements that promptly and correctly inform decisions.

Graphene, the wonder material, has captured the spotlight of electronics researchers since its discovery. Even though it has proven to be unfit for use in digital transistors, one of graphene’s lasting contributions is that it ushered in a whole new world of two-dimensional (2D) materials. One sub-family of such 2D materials are transition metal dichalcogenides (TMDs), which comprise ~40 different materials with a range of electronic properties, including insulators, semiconductors, and conductors. Molybdenum disulfide (MoS2) is one of the most studied semiconducting TMDs in recent years because of its air stability, high effective mass and sizable bandgap ranging from 1.2 to 1.9 eV, which make it suitable for transistor applications. Challenges, however, still cloud the promise of unbounded applications for MoS2 and other 2D TMDs. One major difficulty is the formation of high-quality contacts as the performance of the 2D transistors heavily relies on carrier injection through the contact interfaces. Although some progress has been made in recent years, a robust, effective contact scheme is still lacking and keeps the materials from being a viable option for future nanoelectronics.

This dissertation presents systematic studies on the metal interface to 2D materials for both the typical top-contact geometry and a newly developed in-situ edge-contact geometry. First, in the top-contact geometry, two kinds of ion beam sources (broad and convergent) are introduced to create defects in the otherwise dangling bond-free surface of MoS2. Below a certain threshold, these generated defects are shown to promote more efficient carrier transport between the contact metal and MoS2. This ion beam modification approach decreases the contact resistance by 50% and doubles the corresponding current in the device. Second, a pure edge contact scheme is introduced, where an Ar ion beam is used in situ (with the metal deposition system) to etch the MoS2, creating an abrupt edge profile that interfaces with the deposited contact metal (without overlap of the metal on the MoS2). Edge contacts are able to withstand ultimate scaling, down to sub-5 nm, and experimental results from edge contacts with a 20 nm contact length (Lc) yield nominally the same performance as Lc = 60 nm edge contacts. Hence, the in-situ edge contact approach shows great promise for aggressively scaled transistor technology.

New observations on the contact scaling behavior of top contacts is also covered. The transfer length of a typical metal-2D contact is found to be much smaller than previously estimated by studying scaled contacts on the same 2D crystal grain. Other progress in forming contacts to ultrasensitive 2D materials is also presented, where the in-situ ion beam can expose air sensitive materials for deposition of metal contacts without breaking vacuum. Based on these findings, future work is proposed that includes 3D integration of 1D edge-contacted 2D FETs, all-ALD transistors, and metallic CNT contacts to 2D materials. These future projects will push the boundary of our understanding of scaled contact interfaces as well as the development of emergent technologies for future nanoelectronic devices.

Essential to enabling a new generation of electronics, currently built on metal-oxide field-effect transistors (MOSFETs), is the development of novel electronic materials. Conventional materials, such as silicon in MOSFETs, are reaching the physical limits to which they can be scaled down without incurring deleterious side effects. Among the many promising alternative channel materials for MOSFETs are two-dimensional (2D) materials, such as transition metal dichalcogenides (TMDs) and black phosphorus (BP). 2D field-effect transistors (FETs) benefit from the atomic thinness of these materials, allowing them to be aggressively scaled down while avoiding short channel effects (SCEs). Their atomic thinness also means they are physically malleable and have the potential of being integrated directly onto flexible substrates. While 2D crystals show such promise for next generation electronics, some of their intrinsic properties have proven a great hindrance to their implementation. The surface of each 2D crystal is typically an inert basil plane, completely free from dangling bonds. While ideal from a carrier transport perspective, such defect-free surfaces present a considerable challenge for establishing ultrathin, high-quality dielectrics to 2D materials. Since ultrathin dielectrics are an essential aspect of future 2D FETs, this challenge has been a persistent bottleneck for the field.

In this work, the use of plasma-enhanced atomic layer deposition (PEALD) was studied for its ability to enable the nucleation and growth of ultrathin, high-k dielectrics onto various 2D crystal surfaces. It was discovered that the PEALD process can provide significant improvement in the uniform nucleation of films compared to thermal atomic layer deposition (ALD). Demonstration of a top-gate 2D FET with a molybdenum disulfide (MoS2) channel is provided, with the thinnest gate dielectric realized to date at ~3 nm. Further experimental realization of ultrathin PEALD high- dielectrics on MoS2 and BP is presented. Each PEALD dielectric was compared to traditional thermal ALD and integrated into either a top-gate or back-gate FET configuration. Detailed electrical characterization was carried out, revealing that PEALD HfO2 is the most favorable gate-dielectric/passivation layer for both multilayer MoS2 and BP, yielding an enhancement in the back-gate 2D FET properties for both materials. Additionally, the impact of the plasma in the PEALD HfO2 process on MoS2 was examined; revealing that the plasma-induced damage that enables film growth is primarily within the topmost layer – while significant damage occurs to monolayers, less damage is incurred in bilayer and trilayer samples. These findings provide a robust approach for depositing ultra-thin high- dielectrics onto multilayer 2D crystals, with key insights into how a PEALD plasma process impacts the crystal structure and properties of the 2D lattice.

Two-dimensional (2D) materials, such as semiconducting transition metal dichalcogenides (TMDs), have emerged as channel material candidates for aggressively scaled field-effect transistors (FETs). Unlike silicon, 2D TMDs are stable down to their monolayer form, which is merely three atoms thick. The chemically inert surface of TMDs, which is free of dangling bonds, minimizes charge carrier scattering at the different channel interfaces. Unfortunately, that same advantageous property results in an undesired van der Waals (vdW) tunnel barrier when source/drain metal contacts are deposited on the TMD surface. To make matters worse, TMD transistors suffer from strong Fermi-level pinning – a phenomenon that can cause a sizable Schottky barrier for carriers regardless of the contact metal work function. The vdW and Schottky barriers result in 2D FETs exhibiting relatively high contact resistance and thus poor on-current (ION).Researchers have recognized the inadequate metal contact performance in 2D transistors and exerted considerable effort to understand and alleviate that issue using a variety of approaches, including exploring different metals and inserting additional interfacial layers between the metal and TMD. While significant progress has been made in improving the metal-TMD interface quality, there is a more fundamental issue with the typical top-contact configuration. In a technologically viable 2D FET, the contact length (distance over which metal interfaces with the TMD) will be scaled to sub-20 nm, yet experimental demonstrations employ large contact lengths that sometimes reach the order of several microns. At these unrealistically large dimensions, unwanted effects such as current crowding that will degrade contact performance in scaled devices do not manifest. For proper scaling of the whole transistor, simply improving the performance of relatively large top contacts is not sufficient. The edge-contact configuration is a promising alternative to typical top contacts. In this configuration, the TMD is contacted via its reactive edges to render a pure lateral injection mode. This completely eliminates the vdW tunnel barrier because the metal is covalently bonded to the channel. More importantly, it enables maximum scalability since there is no vertical injection for current crowding to occur. However, forming edge contacts is more challenging due to the need for etching edges to the TMD crystal and realizing pure metal-TMD junctions without unwanted interlayers. The work in this dissertation includes investigations that utilize various metal contact materials, TMDs, and processing conditions to uncover the most suitable approach to fabricate edge-contacted TMD FETs. First, an extensive benchmarking exercise was undertaken to arrive at better ways to gauge the potential of 2D materials to fulfill the requirements of specific technology applications. The performance of reported devices with dissimilar structures and bias conditions was normalized by considering the impact of relative electric fields. The analysis indicated that 2D FETs show promise as high-performance (HP) transistors when properly scaled. The results also highlighted the high-temperature growth and subsequent transfer of 2D materials as the best route to feature them in back-end-of-line (BEOL) integrations. Overall, the targeted benchmarking study confirmed the potential of 2D materials to compete with various incumbent transistor technologies. More particularly, edge contacts fit perfectly as enablers in the HP and BEOL transistor categories given the contacts optimal scalability and compatibility with vertical integration. The second study addressed a gap in previously demonstrated edge-contact work. Edge contacts are a less-investigated contact scheme in general, but more specifically, nearly all reported edge-contacted FETs used MoS2 as the channel material, ignoring other promising TMDs like WS2 and WSe2. Important questions regarding how the different TMD will react and perform with edge contacts remained to be answered. Our work demonstrated one of the first edge-contacted WS2 and WSe2 transistors ever reported. Clean edge contacts were created with three distinct metals on each TMD by utilizing an in-situ Ar+ ion source that is integrated with an electron beam (e-beam) evaporation chamber. The ion source was used to etch the TMD selectively from the contact region followed immediately by deposition of the contact metal while remaining under ultrahigh vacuum. It was discovered that the tungsten-based TMDs exhibited a unique etching effect where residual tungsten remained under the contacts despite substrate over-etching. This distinction from Mo-based TMDs revealed critical differences in processing that must be accounted for in edge-contact schemes. The residual W in the contact regions contributed to an unanticipated polarity shift in the Ti-WS2 device and a consistent performance across the use of three distinct metals (Ti, Ni, and Pd) on WSe2. Consideration of this intriguing etching effect could be essential for tungsten-based, edge-contacted TMD transistors. After studying the influence of metal and TMD selection on edge-contact formation and performance, the influence of varying edge-contact etch conditions was explored. It was found that in-situ ion beam processing of Ni-monolayer MoS2 transistors significantly improved yield and on-state performance compared to ex-situ¬ processed devices. In particular, transistors with edge contacts formed using an in-situ Ar+/N2+ process had the highest ION both in a direct comparison of four transistors with different edge-contact formation conditions on the same channel and in a statistical analysis involving all transistors on a chip. The superior performance was attributed to nitrogen atoms passivating sulfur vacancy defects at the exposed edge and reducing carrier scattering at the interface. It was also found that the contamination of MoS2 edges in ex-situ processed devices formed using reactive ion etching (RIE) is nonreversible even with subsequent in-situ Ar+ cleaning after etching and prior to contact metal deposition. While the incorporation of nitrogen in in-situ processing of Ni-MoS2 edge-contacted transistors is beneficial, further investigation into the usefulness of this approach in other metal-TMD systems is required to extend the scope of this recommendation. The last presented study in this dissertation describes the development of a fabrication process for selective deposition of atomic-layer-deposited (ALD) TiN on TMDs. It is of great interest to investigate whether a nucleation-based metallization approach offers any advantage over typical e-beam evaporation for edge contacts. One suggested future direction is to use in-situ Ar+/N2+ ions to create ALD TiN edge contacts on MoTe2 (sulfur and selenium are highly reactive to Ti). This is only one promising metal-TMD combination that could be investigated among the broad range of exciting possibilities with the novel edge contact scheme. Overall, this dissertation work has generated several key findings related to edge-contacted TMDs for future transistor technologies. First, the role of the transition metal in the TMD in terms of edge-contact formation processing, where the heavier W-based TMDs result in residual tungsten under the etched contact region. Second, the impact of in-situ versus ex-situ formation of the edge contacts where the yield and performance of devices processed in situ was markedly better. This advantage of in-situ processing, particularly using nitrogen, was attributed to the passivation of etch-generated defects at the edges of the TMD. Finally, the cumulation of these results indicates that material selection and processing both contribute critically to the resultant structure, morphology, and performance of edge-contacted TMD transistors.

With the advent of the internet-of-things (IoT) and a more connected digital ecosystem, new electronic sensors and systems are needed. Printing has been identified as a means of fabricating low-cost electronics on non-rigid, large-area substrates. Printed electronics have been demonstrated to have the required electrical and mechanical properties to facilitate new and unique flexible electronic sensors for the IoT. One printable material that has demonstrated significant promise, specifically when compared to more traditional printed semiconductors, is solution-processed carbon nanotubes (CNTs). While some work has been done to facilitate the fabrication of CNT thin-film transistors (TFTs), little work has been done to assess the viability and potential of CNT-TFTs and other CNT thin films for real-world sensing applications.

The work contained in this dissertation describes the use of aerosol jet printing to fabricate CNT-TFTs, and the resulting study of their capability for various sensing applications. Aerosol jet printing allows for printing all the materials necessary for a fully-functional CNT-TFT, including the semiconducting thin film, conducting contacts and gate, and insulating gate dielectric. Using this system, flexible and fully printed CNT-TFTs were developed and characterized. Fully printed transistors were fabricated with field-effect mobilities as a high as 16 cm2/(Vs). The transistors were also resilient to substantial bending/strain, showing no measurable performance degradation after 1000 bending cycles at a radius of curvature of 1 mm.

The printed CNT-TFTs were evaluated for several sensing applications, including environmental pressure sensing and point-of-care biological sensing. The biological sensors, which were electronically transduced immunoassays, consisted of an antifouling polymer brush layer to enhance the CNT-TFT sensitivity and printed antibodies for detection of target analytes. Unparalleled sensitivity in unfiltered biological milieus was realized with these printed biosensors, detecting protein concentrations as low as 10 pg/ml in whole blood. In addition to demonstrating an electronically transduced TFT-based biosensor, work was done to develop a stable platform with high yield that will provide the means for a deeper understanding of the biosensing mechanisms of transistor-based sensors. As part of this biosensor platform development, novel solution-gated CNT-TFTs were demonstrated, with stable operation in ionic solutions for periods as long as 5 hours.

Another important electronic sensing technique is capacitive-based sensing. Using aerosol jet printed carbon nanotubes, a capacitive sensor has been developed and demonstrated for measuring insulating material thickness. The sensors rely on the fringing field between two adjacent electrodes interacting with the material out-of-plane, and that interaction being perturbed differently based on the thickness of the overlaid material. This sensor was also demonstrated in a one-dimensional array, which can be used to map tire tread thickness from the outside of the tire.

Overall, this dissertation explores the use of printed carbon nanotubes for diverse sensing applications. While this work provides real-world demonstrations that have potential impact for the IoT, there are also substantial scientific advancements made. Namely, insight into biosensing mechanisms, operation of solution-gated nanomaterial-based transistors, and demonstration of porosity and thickness effects on printed capacitive sensor electrodes.

Essential to metal-oxide-semiconductor field-effect transistor (MOSFET) scaling is the reduction of the supply voltage to mitigate the power consumption and corresponding heat dissipation. Conventional dielectric materials are subject to the thermal limit imposed by the Boltzmann factor in the subthreshold swing, which places an absolute minimum on the supply voltage required to modulate the current. Furthermore, as technology approaches the 5 nm node, electrostatic control of a silicon channel becomes exceedingly difficult, regardless of the gating technique. This notion of "the end of silicon scaling" has rapidly increased research into more scalable channel materials as well as new methods of transistor operation. Among the many promising options are two-dimensional (2D) FETs and negative capacitance (NC) FETs. 2D-FETs make use of atomically thin semiconducting channels that have enabled demonstrated scalability beyond what silicon can offer. NC-FETs demonstrate an effective negative capacitance arising from the integration of a ferroelectric into the transistor gate stack, allowing sub-60 mV/dec switching. While both of these devices provide significant advantages, neither can accomplish the ultimate goal of a FET that is both low-voltage and scalable. However, an appropriate fusion of the 2D-FET and NC-FET into a 2D NC-FET has the potential of enabling a steep-switching device that is dimensionally scalable beyond the 5 nm technology node.

In this work, the motivation for and operation of 2D NC-FETs is presented. Experimental realization of 2D NC-FETs using 2D transition metal dichalcogenide molybdenum disulfide (MoS2) as the channel is shown with two different ferroelectric materials: 1) a solution-processed, polymeric poly(vinylidene difluoride trifluoroethylene) ferroelectric and 2) an atomic layer deposition (ALD) grown hafnium zirconium oxide (HfZrO2) ferroelectric. Each ferroelectric was integrated into the gate stack of a 2D-FET having either a top-gate (polymeric ferroelectric) or bottom-gate (HfZrO2 ferroelectric) configuration. HfZrO2 devices with metallic interfacial layers (between ferroelectric and dielectric) and thinner ferroelectric layers were found to reduce both the hysteresis and the threshold voltage. Detailed characterization of the devices was performed and, most significantly, the 2D NC-FETs with HfZrO2 reproducibly yielded subthreshold swings well below the thermal limit with over more than four orders of magnitude in drain current modulation. HfZrO2 devices without metallic interfacial layers were utilized to explore the impact of ferroelectric thickness, dielectric thickness, and dielectric composition on device performance. The impact of an interfacial metallic layer on the device operation was investigated in devices with HfZrO2 and shown to be crucial at enabling sub-60 mV/dec switching and large internal voltage gains. The significance of dielectric material choice on device performance was explored and found to be a critical factor in 2D NC-FET transistor operation. These successful results pave the way for future integration of this new device structure into existing technology markets.

For decades, digital logic devices have been made from silicon-based metal-oxide- semiconductor field-effect transistors (MOSFETs). The development of MOSFETs has followed Moore’s law, doubling the number of transistors on an integrated circuit area every two years. Recently, progress has strayed from this path due to difficulties of overcoming the physical scaling limits and power dissipation issues. Two main concepts have been proposed to continue the scaling of transistor technology: (1) the exploration of new channel materials beyond silicon to continue miniaturization, and (2) the reduction of power consumption with a new device mechanism to overcome the thermionic switching limit in MOSFETs.

Two-dimensional (2D) semiconductors, such as molybdenum disulfide (MoS2), are

promising candidates for enabling aggressive miniaturization of field-effect transistors (FETs) because of their atomically-thin body thickness and facile integration into a junctionless transistor topology that offers enhanced electrostatic control of the channel, making them ideal candidates to enable aggressive miniaturization of FETs. Meanwhile, integrating a ferroelectric (FE) layer into the gate stack of a FET produces amplified internal voltage through the negative capacitance (NC) effect, enabling the resultant NC- FETs to operate with reduced supply voltage VDD by overcoming the 60 mV/dec thermal limit in switching behavior. Negative capacitance field-effect transistors with 2D semiconducting channels (2D NC-FETs) have become increasingly attractive due to their potential to yield sub-thermal switching behavior in a physically scalable device.

Combining these two advantages (2D channels with NC-FET switching) for steep- slope 2D NC-FETs has recently become more feasible using hafnium zirconium oxide layer (HZO) as the ferroelectric layer in the gate stack. 2D NC-FETs with HZO exhibit unique behavior that has been shown to improve both on- and off-states; however, the underlying operating mechanism in these devices, including the role of capacitance matching and the scaling of the channel length, is not well characterized or fully understood. The main objective of this dissertation work was to study and elucidate the factors driving the unique operation of 2D NC-FETs with HZO ferroelectric layers. The work begins by examining the FE behavior of HZO with various capping layers, thicknesses, and annealing temperatures. Then, bottom-gated 2D NC-FETs without a metallic interfacial layer were examined to investigate the effects of dielectric material composition, as well as ferroelectric and dielectric oxide thicknesses, on the operation and performance of the devices. Ultimately, 2D NC-FETs that achieve remarkable and robust short-channel behavior are demonstrated and analyzed, providing evidence that the NC effect enhances gate control and is beneficial to channel length scaling.

The results of this work contribute to the field in three major areas: (1) discovery of elemental metal capping layers for yielding ferroelectricity in HZO, which enables the integration of HZO into various device structures; (2) identification of the impact that FE layers and oxide thickness have on 2D NC-FETs from experimental evidence, yielding deeper understanding and support for previous simulation results in the field; and (3) demonstration of subthreshold switching improvement at short channel lengths in 2D NC-FETs along with an exploration of the mechanism that explains this unconventional behavior of scaling and the preferential performance of the 2D NC-FET.

In summary, this work involves investigating the performance and operation of 2D NC-FETs with HZO ferroelectrics in various gate stack configurations and at different dimensions. Future plans include exploring the unique benefits of 2D materials for NC- FETs, especially the impact on performance from different 2D materials with distinct quantum capacitances, as well as exploring the impact of the thickness of a 2D channel material. To further understand and improve the performance, a top-gated device structure that allows isolation of the contacts from the gate (i.e., no overlapping fields) should be studied. Overall, this work, in combination with the completed works discussed herein, provides an analysis of the operation of 2D NC-FETs based on HZO gate stacks and scaling.