Browsing by Author "Agrawal, M"

Now showing items 1-3 of 3

    • Test-Cost Modeling and Optimal Test-Flow Selection of 3D-Stacked ICs 

      Agrawal, M; Chakrabarty, K (2015-03-02)
      Three-dimensional (3D) integration is an attractive technology platform for next-generation ICs. Despite the benefits offered by 3D integration, test cost remains a major concern, and analysis and tools are needed to understand ...

    • Test-Cost Optimization and Test-Flow Selection for 3D-Stacked ICs 

      Agrawal, M; Chakrabarty, K (2012-10-26)
      Three-dimensional (3D) integration is an attractive technology platform for next-generation ICs. Despite the benefits offered by 3D integration, test cost remains a major concern, and analysis and tools are needed to understand ...

    • Test-Delivery Optimization in Manycore SOCs 

      Agrawal, M; Richter, M; Chakrabarty, K (2013-03-18)
      We present two test-data delivery optimization algorithms for system on-chip (SOC) designs with hundreds of cores, where a network-on-chip (NOC) is used as the interconnection fabric. We first present an e ective algorithm ...