Now showing items 1-6 of 6

    • Architectural implications of nanoscale-integrated sensing and computing 

      Pistol, C; Chongchitmate, W; Dwyer, C; Lebeck, AR (IEEE Micro, 2010-01-01)
      The authors explore nanoscale sensor processor (nSP) architectures. Their design includes a simple accumulator-based instruction-set architecture, sensors, limited memory, and instruction-fused sensing. Using nSP technology ...
    • Modeling and simulation of a nanoscale optical computing system 

      Pang, J; Lebeck, AR; Dwyer, C (Journal of Parallel and Distributed Computing, 2014-01-01)
      Optical nanoscale computing is one promising alternative to the CMOS process. In this paper we explore the application of Resonance Energy Transfer (RET) logic to common digital circuits. We propose an Optical Logic Element ...
    • More is Less, Less is More: Molecular-Scale Photonic NoC Power Topologies 

      Pang, J; Dwyer, C; Lebeck, AR (ACM SIGPLAN NOTICES, 2015-04)
    • Nanoscale Resonance Energy Transfer-Based Devices for Probabilistic Computing 

      Lebeck, AR; Dwyer, CL; Wang, S (IEEE Micro, 2015-09-01)
      © 1981-2012 IEEE.Despite the theoretical advances in probabilistic computing, a fundamental mismatch persists between the deterministic hardware that traditional computers use and the stochastic nature of probabilistic ...
    • Rhythm: Harnessing data parallel hardware for server workloads 

      Agrawal, SR; Pistol, V; Pang, J; Tran, J; Tarjan, D; Lebeck, AR (International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS, 2014-03-14)
      Trends in increasing web traffic demand an increase in server throughput while preserving energy efficiency and total cost of ownership. Present work in optimizing data center efficiency primarily focuses on the data center ...
    • Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all 

      Romanescu, BF; Lebeck, AR; Sorin, DJ; Bracy, A (Proceedings - International Symposium on High-Performance Computer Architecture, 2010-05-27)
      We propose UNITD, a unified hardware coherence framework that integrates translation coherence into the existing cache coherence protocol. In UNITD coherence protocols, the TLBs participate in the cache coherence protocol ...