Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all
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We propose UNITD, a unified hardware coherence framework that integrates translation coherence into the existing cache coherence protocol. In UNITD coherence protocols, the TLBs participate in the cache coherence protocol just like the instruction and data caches, without requiring any changes to the existing coherence protocol. UNITD eliminates the need for the software TLB shootdown routine, a procedure known to be performance costly and non-scalable. We evaluate snooping and directory UNITD coherence protocols on multicore processors with 2-16 cores, and we demonstrate that UNITD reduces the performance penalty associated with TLB coherence to almost zero. ©2009 IEEE.
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Professor of Computer Science
My research is in the general area of computer architecture. However, I have interests in nearly all computer systems related topics, spanning from atoms to applications.
Professor of Electrical and Computer Engineering
Dr. Daniel Sorin is the Addy Professor of Electrical and Computer Engineering and of Computer Science. His research interests are primarily in computer architecture and dependability.
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