Architectural implications of nanoscale-integrated sensing and computing
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The authors explore nanoscale sensor processor (nSP) architectures. Their design includes a simple accumulator-based instruction-set architecture, sensors, limited memory, and instruction-fused sensing. Using nSP technology based on optical resonance energy transfer logic helps them decrease the design's size; their smallest design is about the size of the largest-known virus. © 2006 IEEE.
Published Version (Please cite this version)10.1109/MM.2010.9
Publication InfoPistol, C; Chongchitmate, W; Dwyer, C; & Lebeck, AR (2010). Architectural implications of nanoscale-integrated sensing and computing. IEEE Micro, 30(1). pp. 110-120. 10.1109/MM.2010.9. Retrieved from https://hdl.handle.net/10161/3766.
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Associate Professor in the Department of Electrical and Computer Engineering
Dr. Chris Dwyer received his B.S. in computer engineering from the Pennsylvania State University in 1998, and his M.S. and Ph.D. in computer science from the University of North Carolina at Chapel Hill in 2000 and 2003, respectively.
This author no longer has a Scholars@Duke profile, so the information shown here reflects their Duke status at the time this item was deposited.
Professor of Computer Science
My research is in the general area of computer architecture. However, I have interests in nearly all computer systems related topics, spanning from atoms to applications.
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