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Functional test-sequence grading at register-transfer level

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Date
2012-01-01
Authors
Fang, H
Chakrabarty, K
Jas, A
Patil, S
Tirumurti, C
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Abstract
We propose output deviations as a surrogate metric to grade functional test sequences at the register-transfer level without explicit fault simulation. Experimental results for the open-source Biquad filter core and the Scheduler module of the Illinois Verilog Model show that the deviations metric is computationally efficient and it correlates well with gate-level coverage for stuck-at, transition-delay and bridging faults. Results also show that functional test sequences reordered based on output deviations provide steeper gate-level fault coverage ramp-up compared to other ordering methods. © 2011 IEEE.
Type
Journal article
Permalink
https://hdl.handle.net/10161/4641
Published Version (Please cite this version)
10.1109/TVLSI.2011.2163651
Publication Info
Fang, H; Chakrabarty, K; Jas, A; Patil, S; & Tirumurti, C (2012). Functional test-sequence grading at register-transfer level. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 20(10). pp. 1890-1894. 10.1109/TVLSI.2011.2163651. Retrieved from https://hdl.handle.net/10161/4641.
This is constructed from limited available data and may be imprecise. To cite this article, please review & use the official citation provided by the journal.
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Scholars@Duke

Chakrabarty

Krishnendu Chakrabarty

John Cocke Distinguished Professor of Electrical and Computer Engineering
Krishnendu Chakrabarty is the John Cocke Distinguished Professor of Electrical and Computer Engineering and Professor of Computer Science at Duke University.
This author no longer has a Scholars@Duke profile, so the information shown here reflects their Duke status at the time this item was deposited.

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