Advancing ML for EDA: From Secure Data to Generative AI
| dc.contributor.advisor | Chen, Yiran | |
| dc.contributor.author | Chang, Chen-Chia | |
| dc.date.accessioned | 2025-07-02T19:03:06Z | |
| dc.date.available | 2025-07-02T19:03:06Z | |
| dc.date.issued | 2025 | |
| dc.department | Electrical and Computer Engineering | |
| dc.description.abstract | Machine learning (ML) is increasingly revolutionizing electronic design automation (EDA), driving higher levels of automation in chip design. However, current ML4EDA workflows face several challenges that hinder efficient model development. First, secure data sharing remains a persistent obstacle due to confidentiality concerns among design companies, limiting the availability of large and diverse datasets. Second, the reliance on manual feature selection and hand-crafted model architectures in EDA incurs significant engineering effort and prolongs development cycles. Third, once a model is ready for commercialization, it is vulnerable to model extraction attacks that can compromise its business value. Addressing these three issues is critical to advancing ML4EDA. Meanwhile, generative AI, particularly large language models (LLMs), has demonstrated remarkable capability in generating complex structures, making it an attractive direction for enhancing and transforming traditional EDA optimization. To tackle these problems, my research proposes an \textbf{advanced ML4EDA development flow} and explores the integration of generative AI. The main contributions are:PRICING -- A privacy-preserving data-sharing framework that safeguards circuit features while significantly improving model accuracy. AutoML Framework -- An automated pipeline for feature selection and model architecture design tailored to EDA tasks, reducing engineering overhead. Model Extraction Attack Methods -- A demonstration of how malicious actors can replicate trained EDA models, highlighting urgent security risks. LaMAGIC -- An LM-based topology generation model for automated analog circuit design, achieving high success rates in power converter applications. DRC-Coder -- A code generation framework that leverages an LLM autonomous agent system for design rule checking (DRC) at the sub-3nm technology node. By integrating these approaches, this research lays the groundwork for a robust ML4EDA development pipeline, from secure data sharing, automated model development, and next-generation generative design methods. | |
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| dc.subject | Electrical engineering | |
| dc.subject | Computer science | |
| dc.subject | electronic design automation | |
| dc.subject | Machine learning | |
| dc.title | Advancing ML for EDA: From Secure Data to Generative AI | |
| dc.type | Dissertation | |
| duke.embargo.months | 0.01 | |
| duke.embargo.release | 2025-07-08 |