Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all
dc.contributor.author | Romanescu, BF | |
dc.contributor.author | Lebeck, AR | |
dc.contributor.author | Sorin, DJ | |
dc.contributor.author | Bracy, A | |
dc.contributor.editor | Jacob, Matthew T | |
dc.contributor.editor | Das, Chita R | |
dc.contributor.editor | Bose, Pradip | |
dc.date.accessioned | 2011-05-18T01:55:33Z | |
dc.date.issued | 2010-05-27 | |
dc.description.abstract | We propose UNITD, a unified hardware coherence framework that integrates translation coherence into the existing cache coherence protocol. In UNITD coherence protocols, the TLBs participate in the cache coherence protocol just like the instruction and data caches, without requiring any changes to the existing coherence protocol. UNITD eliminates the need for the software TLB shootdown routine, a procedure known to be performance costly and non-scalable. We evaluate snooping and directory UNITD coherence protocols on multicore processors with 2-16 cores, and we demonstrate that UNITD reduces the performance penalty associated with TLB coherence to almost zero. ©2009 IEEE. | |
dc.identifier.isbn | 9781424456581 | |
dc.identifier.issn | 1530-0897 | |
dc.identifier.uri | ||
dc.language.iso | en_US | |
dc.publisher | IEEE | |
dc.relation.ispartof | Proceedings - International Symposium on High-Performance Computer Architecture | |
dc.title | Unified Instruction/Translation/Data (UNITD) coherence: One protocol to rule them all | |
dc.type | Conference | |
duke.contributor.orcid | Lebeck, AR|0000-0003-1893-5464 | |
pubs.organisational-group | Computer Science | |
pubs.organisational-group | Duke | |
pubs.organisational-group | Electrical and Computer Engineering | |
pubs.organisational-group | Pratt School of Engineering | |
pubs.organisational-group | Trinity College of Arts & Sciences | |
pubs.publication-status | Published |