Fault Tolerance for RRAM-Based Matrix Operations
| dc.contributor.author | Liu, Mengyun | |
| dc.contributor.author | Xia, Lixue | |
| dc.contributor.author | Wang, Yu | |
| dc.contributor.author | Chakrabarty, K | |
| dc.date.accessioned | 2018-09-19T19:33:52Z | |
| dc.date.available | 2018-09-19T19:33:52Z | |
| dc.date.updated | 2018-09-19T19:33:50Z | |
| dc.description.abstract | An RRAM-based computing system (RCS) provides an energy efficient hardware implementation of vector-matrix multiplication for machine-learning hardware. However, it is vulnerable to faults due to the immature RRAM fabrication process. We propose an efficient fault tolerance method for RCS; the proposed method, referred to as extended-ABFT (X-ABFT), is inspired by algorithm-based fault tolerance (ABFT). We utilize row checksums and test-input vectors to extract signatures for fault detection and error correction. We present a solution to alleviate the overflow problem caused by the limited number of voltage levels for the test-input signals. Simulation results show that for a Hopfield classifier with faults in 5% of its RRAM cells, X-ABFT allows us to achieve nearly the same classification accuracy as in the fault-free case. | |
| dc.identifier.uri | ||
| dc.publisher | IEEE | |
| dc.subject | ABFT | |
| dc.subject | fault detection | |
| dc.subject | fault tolerance | |
| dc.subject | neuromorphic computing | |
| dc.subject | RRAM | |
| dc.title | Fault Tolerance for RRAM-Based Matrix Operations | |
| dc.type | Report | |
| pubs.organisational-group | Pratt School of Engineering | |
| pubs.organisational-group | Duke | |
| pubs.organisational-group | Electrical and Computer Engineering | |
| pubs.publication-status | Published |
Files
Original bundle
- Name:
- duke technical report_ABFT_Mengyun Liu.pdf
- Size:
- 1.16 MB
- Format:
- Adobe Portable Document Format
- Description:
- Published Version