Integrating Computer Architecture and Coding Theory to Advance Emerging Memory Technologies

New memory technologies constantly emerge promising higher density, bandwidth, latency, and power efficiency comparing to traditional solutions. However, these technologies often suffer from substantial drawbacks like limited lifetime or low fault tolerance. These drawbacks prevent the integration of these technologies in modern computer systems and increase their cost of implementation. In this work, we utilize solutions both from the disciplines of computer architecture and coding theory to address the drawbacks of emerging memory technologies. By integrating computer architecture and coding theory we can design more optimized solutions, paving the way for emerging memory technologies to become viable and reliable options for modern computer systems.

More specifically we design MinWear codes to increase the lifetime of Flash memory, providing larger lifetime gains for smaller capacity costs comparing to prior work. We also design GreenFlag codes to address shift errors in 3D racetrack memory, providing double shift error detection and correction. Additionally, we enhance the fault tolerance of 3D-stacked DRAM with a two-level coding technique called Jenga. Jenga provides fault tolerance in all the granularity levels of the 3D-stacked DRAM with minimal performance overheads while outperforming prior solutions.