Decoupling Loads for Nano-Instruction Set Computers
| dc.contributor.author | Hilton, AD | |
| dc.contributor.author | Lee, BC | |
| dc.contributor.author | Huang, Z | |
| dc.date.accessioned | 2016-08-22T00:34:52Z | |
| dc.date.issued | 2016-08-24 | |
| dc.description.abstract | © 2016 IEEE.We propose an ISA extension that decouples the data access and register write operations in a load instruction. We describe system and hardware support for decoupled loads. Furthermore, we show how compilers can generate better static instruction schedules by hoisting a decoupled load's data access above may-alias stores and branches. We find that decoupled loads improve performance with geometric mean speedups of 8.4%. | |
| dc.identifier.isbn | 9781467389471 | |
| dc.identifier.uri | ||
| dc.publisher | IEEE | |
| dc.relation.ispartof | Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016 | |
| dc.relation.isversionof | 10.1109/ISCA.2016.43 | |
| dc.title | Decoupling Loads for Nano-Instruction Set Computers | |
| dc.type | Other article | |
| pubs.begin-page | 406 | |
| pubs.end-page | 417 | |
| pubs.organisational-group | Computer Science | |
| pubs.organisational-group | Duke | |
| pubs.organisational-group | Electrical and Computer Engineering | |
| pubs.organisational-group | Pratt School of Engineering | |
| pubs.organisational-group | Trinity College of Arts & Sciences | |
| pubs.publication-status | Published |
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